Name
Abstract | ||
|---|---|---|
This paper describes the design and implementationof SYNTEST, a system for the design of self-testableVLSI circuits from behavioral description. SYNTESTconsists of several algorithmic synthesis tools for scheduling,testable allocation, and optimum test points selection.A key feature in SYNTEST is the tight intercationbetween the system tools: the scheduler, the allocator,and the test tool. The system uses a technologylibrary for optimizing the original structure. All toolsinteract... |
Year | DOI | Venue |
|---|---|---|
1992 | 10.1109/EURDAC.1992.246212 | EURO-DAC |
Keywords | Field | DocType |
system-level design | Design for testing,Computer architecture,Test Management Approach,Scheduling (computing),Computer science,Electronic system-level design and verification,Real-time computing,White-box testing,Graphical user interface,Iterative design,Graphical user interface testing | Conference |
ISBN | Citations | PageRank |
0-8186-2780-8 | 30 | 1.90 |
References | Authors | |
15 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Haidar M. Harmanani | 1 | 179 | 19.13 |
| C. Papachristou | 2 | 56 | 5.81 |
| Scott Chiu | 3 | 199 | 16.59 |
| Mehrdad Nourani | 4 | 908 | 84.95 |