Abstract | ||
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DRAM-based main memories are energy-hungry components of modern computer systems. Since accesses to DRAM need a complex protocol, the performance of an address-mapping scheme that decides physical locations of data based on physical addresses has a big impact on energy consumption. To improve the energy efficiency, this paper proposes a mechanism that dynamically selects an appropriate address-mapping scheme under the consideration of a trade-off between performance and power consumption. The mechanism works so as to reduce the energy consumption of the main memory. The evaluation results show that the proposed mechanism can reduce the energy consumption in comparison with conventional address-mapping schemes, which do not change their address mappings. |
Year | DOI | Venue |
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2015 | 10.1109/CoolChips.2015.7158660 | 2015 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS XVIII) |
Keywords | Field | DocType |
DRAM,rank,address mapping,energy consumption | Dynamic random-access memory,Dram,Address mapping,Efficient energy use,Universal memory,Memory management,Engineering,Computer hardware,Energy consumption,Embedded system,Power consumption | Conference |
Citations | PageRank | References |
0 | 0.34 | 4 |
Authors | ||
6 |
Name | Order | Citations | PageRank |
---|---|---|---|
Masayuki Sato | 1 | 1 | 2.40 |
Chengguang Han | 2 | 0 | 0.34 |
Kazuhiko Komatsu | 3 | 0 | 2.03 |
Ryusuke Egawa | 4 | 109 | 28.68 |
Hiroyuki Takizawa | 5 | 273 | 46.54 |
Hiroaki Kobayashi | 6 | 108 | 14.52 |