Name
Title | ||
|---|---|---|
Improved logic synthesis for memristive stateful logic using multi-memristor implication |
Abstract | ||
|---|---|---|
This paper presents two contributions to logic synthesis for memristive stateful logic. Firstly, we demonstrate the necessity to correct results provided by existing logic synthesis methods to ensure the expected computation. Secondly, we propose the concept of multi-memristor implication as a generalization of multi-input implication. Experimental results have shown a reduction of 6.5% in the number of operations when compared to previous works. |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1109/ISCAS.2015.7168600 | International Symposium on Circuits and Systems |
Keywords | Field | DocType |
memristor, stateful logic, logic synthesis, material implication logic, digital circuit | Logic synthesis,Logic gate,Sequential logic,Pass transistor logic,Logic optimization,Computer science,Electronic engineering,Theoretical computer science,Resistor–transistor logic,Logic family,Register-transfer level | Conference |
ISSN | Citations | PageRank |
0271-4302 | 1 | 0.37 |
References | Authors | |
8 | 5 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Felipe S. Marranghello | 1 | 21 | 6.50 |
| Vinicius Callegaro | 2 | 31 | 6.40 |
| Mayler G. A. Martins | 3 | 88 | 10.08 |
| André Inácio Reis | 4 | 134 | 21.33 |
| Renato P. Ribas | 5 | 204 | 33.52 |