Title | ||
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Transfer and non-transfer stacking technologies based on chip-to-wafer self-asembly for high-throughput and high-precision alignment and microbump bonding |
Abstract | ||
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Two types of high-throughput and high-precision multichip-to-wafer 3D stacking approaches are demonstrated: one is non-transfer stacking and the other one is transfer stacking. Both the stacking approaches employ a self-assembly technologies using liquid surface tension. In the former stacking scheme, large number of chips having 20-μm-square Cu/SnAg microbumps are directly self-assembled face-down on an interposer wafer, like flip-chip bonding. On the other hand, in the latter stacking scheme, the many chips having the microbumps are self-assembled face-up on a carrier wafer with bipolar electrodes for electrostatic chucking. Then, the latter chips are transferred from the carrier to another interposer in wafer-level processing. The alignment accuracies are evaluated and compared between the two stacking approaches. The resulting daisy chains show good electrical properties comparable to conventional flip-chip bonding. |
Year | DOI | Venue |
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2015 | 10.1109/3DIC.2015.7334578 | 2015 International 3D Systems Integration Conference (3DIC) |
Keywords | Field | DocType |
Self-Assembly,Chip-to-Wafer,3D Chip Stacking,Alignment,Microbumps | Wafer,Nanotechnology,Surface tension,Self-assembly,Interposer,Throughput,Materials science,Electrode,Stacking | Conference |
ISSN | Citations | PageRank |
2164-0157 | 0 | 0.34 |
References | Authors | |
3 | 12 |
Name | Order | Citations | PageRank |
---|---|---|---|
Takafumi Fukushima | 1 | 181 | 25.78 |
Taku Suzuki | 2 | 0 | 0.34 |
Hideto Hashiguchi | 3 | 2 | 0.86 |
Chisato Nagai | 4 | 0 | 1.01 |
Jichoel Bea | 5 | 6 | 3.02 |
Hiroyuki Hashimoto | 6 | 0 | 1.01 |
Mariappan Murugesan | 7 | 12 | 6.59 |
Kang Wook Lee | 8 | 79 | 25.09 |
Tetsu Tanaka | 9 | 24 | 5.98 |
Kazushi Asami | 10 | 0 | 0.34 |
Yasuhiro Kitamura | 11 | 0 | 1.01 |
Mitsumasa Koyanagi | 12 | 174 | 58.79 |