Title
15.4 A 280µW 24kHz-BW 98.5dB-SNDR chopped single-bit CT ΔΣM achieving <10Hz 1/f noise corner without chopping artifacts.
Abstract
Many industrial applications require high-resolution ADCs whose low-frequency performance is important. CTDSMs are attractive due to their implicit antialiasing and resistive inputs. However, their low-frequency precision is degraded by flicker noise. The loop filter of such modulators is usually realized using active-RC techniques, and the CTDSMsu0027 1/f noise is mostly due to the input stage of the 1st OTA. Using large input devices to reduce 1/f noise greatly increases area occupied by the input stage, and degrades linearity due to the increased parasitic capacitance at the OTA virtual ground.
Year
Venue
Field
2016
ISSCC
Flicker noise,Computer science,Noise (electronics),Phase noise,Electronic engineering,Noise temperature,Noise spectral density,Effective input noise temperature,Noise generator,Noise (radio),Electrical engineering
DocType
Citations 
PageRank 
Conference
1
0.40
References 
Authors
2
3
Name
Order
Citations
PageRank
Sujith Billa110.40
Amrith Sukumaran2203.58
Shanthi Pavan339187.81