Name
Abstract | ||
|---|---|---|
IR-drop monitoring has been an effective means to assess the power integrity in real silicon. Existing methods, however, fail to achieve a high accuracy and a high sampling rate simultaneously. In this paper, we present a novel method to resolve this dilemma. First of all, we focus on the measurement of the worst-case IR-drop, instead of the entire sampled VDD waveform. This strategy can make a high sampling rate easily viable. Secondly, we perform periodic calibration to account for not only the process variation but also the temperature change. Post-layout simulation indicates that this method can support 1 GHz sample rate while keeping the measurement error less than 4.81 mV at the same time. |
Year | DOI | Venue |
|---|---|---|
2013 | 10.1109/VLDI-DAT.2013.6533865 | VLSI-DAT |
Keywords | Field | DocType |
IR-drop, On-Chip Monitoring, Sampling Rate, Maximum Clock Period Measurement, Process Calibration | Power network design,Computer science,Waveform,Sampling (signal processing),Power integrity,Electronic engineering,Real-time computing,Process variation,Temperature measurement,Observational error,Calibration | Conference |
ISSN | ISBN | Citations |
2474-2724 | 978-1-4673-4435-7 | 1 |
PageRank | References | Authors |
0.38 | 5 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Chen-Hsiang Hsu | 1 | 1 | 0.38 |
| Shi-Yu Huang | 2 | 766 | 70.53 |
| Ding-Ming Kwai | 3 | 521 | 46.85 |
| Yung-Fa Chou | 4 | 244 | 23.76 |