Name
Title | ||
|---|---|---|
Bringing Modern Hierarchical Memory Systems Into Focus: A study of architecture and workload factors on system performance |
Abstract | ||
|---|---|---|
The increasing size of workloads has led to the development of new technologies and architectures that are intended to help address the capacity limitations of DRAM main memories. The proposed solutions fall into two categories: those that re-engineer Flash-based SSDs to further improve storage system performance and those that incorporate non-volatile technology into a Hybrid main memory system. These developments have blurred the line between the storage and memory systems. In this paper, we examine the differences between these two approaches to gain insight into the types of applications and memory technologies that benefit the most from these different architectural approaches. In particular this work utilizes full system simulation to examine the impact of workload randomness on system performance, the impact of backing store latency on system performance, and how the different implementations utilize system resources differently. We find that the software overhead incurred by storage based implementations can account for almost 50% of the overall access latency. As a result, backing store technologies that have an access latency up to 25 microseconds tend to perform better when implemented as part of the main memory system. We also see that high degrees of random access can exacerbate the software overhead problem and lead to large performance advantages for the Hybrid main memory approach. Meanwhile, the page replacement algorithm utilized by the OS in the storage approach results in considerably better performance on highly sequential workloads at the cost of greater pressure on the cache. |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1145/2818950.2818975 | MEMSYS |
Field | DocType | Citations |
Memory protection,Interleaved memory,Computer architecture,Uniform memory access,Physical address,Virtual memory,Cache-only memory architecture,Memory management,Non-uniform memory access,Engineering,Embedded system | Conference | 0 |
PageRank | References | Authors |
0.34 | 17 | 5 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Paul Tschirhart | 1 | 1 | 1.71 |
| Jim Stevens | 2 | 1 | 1.37 |
| Zeshan Chishti | 3 | 723 | 34.65 |
| Shih-Lien Lu | 4 | 958 | 67.34 |
| Bruce Jacob | 5 | 1543 | 103.58 |