Name
Title | ||
|---|---|---|
Designing area-efficient controllers for multi-cycle transient fault tolerant systems |
Abstract | ||
|---|---|---|
This paper discusses a controller design in high-level synthesis to tolerate multi-cycle transient faults under the situation where its datapath has the ability of tolerating such faults. It focuses especially on the control signal generator (or output logic) that is a component of the controller feeding control signals to the datapath in a controller-datapath system, and presents a method of controller synthesis that leverages the error correction/detection ability of the datapath. Experimental results show that the proposed method can synthesize fault tolerant controllers with small area overhead compared with the conventional method based on triple modular redundancy (TMR). |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1109/ETS.2015.7138742 | 2015 20th IEEE European Test Symposium (ETS) |
Keywords | Field | DocType |
area-efficient controller,multicycle transient fault tolerant system,high-level synthesis,control signal generator,controller-datapath system,controller synthesis method,error correction,error detection,fault tolerant controller,triple modular redundancy | Control theory,Datapath,Computer science,Controller design,Signal generator,Triple modular redundancy,Real-time computing,Error detection and correction,Electronic engineering,Fault tolerance,Control system | Conference |
ISSN | Citations | PageRank |
1530-1877 | 2 | 0.43 |
References | Authors | |
3 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Tsuyoshi Iwagaki | 1 | 29 | 8.42 |
| Yutaro Ishimori | 2 | 2 | 0.43 |
| Hideyuki Ichihara | 3 | 96 | 18.92 |
| Tomoo Inoue | 4 | 15 | 3.22 |