Name
Title | ||
|---|---|---|
Deadlock Detection In Conditional Asynchronous Circuits Under Mismatched Branch Selection |
Abstract | ||
|---|---|---|
In this paper we introduce an algorithm that detects the deadlock in conditional asynchronous circuits when the selection controls are not matched. By knowing the slack in each branch and the detailed selection pattern for each Split and Merge, the algorithm detects the deadlock, specifies the branch at which the deadlock occurs, and determines how much slack is needed to free the deadlock. The proposed algorithm is implemented and tested against Verilog simulation. |
Year | Venue | Keywords |
|---|---|---|
2015 | 2015 IEEE CONFERENCE ON ELECTRONICS, CIRCUITS, AND SYSTEMS (ICECS) | Ayncronous Circuits, Deadlock |
Field | DocType | Citations |
Asynchronous communication,Edge chasing,Computer science,Parallel computing,Deadlock,Deadlock prevention algorithms,Verilog,Merge (version control),Electronic circuit | Conference | 0 |
PageRank | References | Authors |
0.34 | 4 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Eslam Yahya | 1 | 25 | 5.94 |
| Hatem Zakaria | 2 | 12 | 1.82 |
| Yehea Ismail | 3 | 199 | 31.36 |