Paper Info
Title
Power Optimization Considering the Chip Temperature of Low Power Reconfigurable Accelerator CMA-SOTB.
Abstract
For low power yet high performance processing in battery driven devices, a coarse grained reconfigurable accelerator called Cool Mega Array (CMA)-SOTB is implemented by using Silicon on Thin BOX (SOTB), a new process technology developed by the Low-power Electronics Association & Project (LEAP). This chip has three voltages for controlling power and performance, supply voltage, PE-Array body bias voltage and microcontroller body bias voltage. In order to find the optimal operational point for a given requirement, a large effort for measurements and adjustments is required. This paper proposes power model for finding the optimal operation point from several measurement results. From the proposed model, the power can be estimated with 4.4% difference from the measured value on average. By using the model, the optimal source voltage and body bias voltages for PE-array and microcontroller can be obtained for a given operational frequency. Compared with the result of the exhaustive search, 37.4% of energy is saved with much small effort of measurements.
Year
DOI
Venue
2015
10.1109/CANDAR.2015.19
CANDAR
Keywords
Field
DocType
Power optimization,Body bias control,SOTB
Power optimization,Voltage source,Computer science,Voltage,Chip,Electronics,Microcontroller,Battery (electricity),Electrical engineering,Embedded system,Biasing
Conference
ISSN
Citations 
PageRank 
2379-1888
2
0.46
References 
Authors
8
4
Name
Order
Citations
PageRank
Yu Fujita1163.60
Hayate Okuhara2115.98
Koichiro Masuyama372.69
Hideharu Amano41375210.21