Name
Abstract | ||
|---|---|---|
Large scale synchronous network-on-chip (NoC) requires complex clock tree design, which leads to a large area overhead and power consumption. Based on handshaking protocols, asynchronous NoC does not have global clock tree distribution, which results in a natural power saving mode without any explicit clock gating. However, the faults occurring in such asynchronous networks will seriously affect their performances. In this paper, we propose AFTER, an Asynchronous Fault-TolErant Router, which uses the quasi delay insensitive (QDI) logic. The proposed router is able to detect the faults of ports and links. Then, a fault-tolerant routing mechanism, based on the port priority in different quadrants, is proposed to maximize the number of packets that can be transmitted via the shortest paths. In this way, the fault-tolerance of asynchronous routers can be achieved. Besides that, AFTER could also achieve high scalability, and is suitable for the large scale globally asynchronous locally synchronous (GALS) system. The experimental results show that, when faults occur in the network, AFTER has a better fault-tolerance performance than the reference. |
Year | DOI | Venue |
|---|---|---|
2016 | 10.1142/S021812661650050X | JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS |
Keywords | Field | DocType |
Asynchronous NoC,GALS system,QDI logic,fault-tolerant | Asynchronous communication,Clock gating,Asynchronous system,Computer science,Globally asynchronous locally synchronous,Network on a chip,Handshaking,Router,Asynchronous circuit,Embedded system | Journal |
Volume | Issue | ISSN |
25 | 6 | 0218-1266 |
Citations | PageRank | References |
2 | 0.38 | 17 |
Authors | ||
6 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Yiming Ouyang | 1 | 13 | 4.38 |
| Qi Chen | 2 | 2 | 0.38 |
| Xiumin Wang | 3 | 107 | 5.09 |
| Xiaoye Ouyang | 4 | 2 | 0.38 |
| Huaguo Liang | 5 | 216 | 33.27 |
| Gaoming Du | 6 | 4 | 0.77 |