Title | ||
---|---|---|
2.31-Gb/s/ch Area-Efficient Crosstalk Canceled Hybrid Capacitive Coupling Interconnect for 3-D Integration. |
Abstract | ||
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This paper introduces a hybrid capacitive coupling interconnects (CCIs) array suitable for bumpless flip-chip 3-D integration. Inside the hybrid array, both single-ended and common-centroid differential CCIs are interleaved together to cancel the crosstalk among them. The crosstalk cancellation capability of its own allows CCIs to be placed closer and thus improves the area efficiency. A high gain... |
Year | DOI | Venue |
---|---|---|
2016 | 10.1109/TVLSI.2016.2516520 | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
Keywords | Field | DocType |
Crosstalk,Arrays,Couplings,Receivers,Transceivers,Integrated circuit interconnections,Capacitance | Transceiver,Coupling,Computer science,Electronic engineering,CMOS,Chip,Hybrid array,Process variation,Jitter,Electrical engineering,Capacitive coupling | Journal |
Volume | Issue | ISSN |
24 | 8 | 1063-8210 |
Citations | PageRank | References |
3 | 0.42 | 14 |
Authors | ||
4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Myat Thu Linn Aung | 1 | 11 | 2.69 |
Teck Heng Lim | 2 | 3 | 0.42 |
Takefumi Yoshikawa | 3 | 18 | 6.62 |
Tae-hyoung Kim | 4 | 163 | 35.19 |