Name
Title | ||
|---|---|---|
Understanding the Relation Between the Performance and Reliability of nand Flash/SCM Hybrid Solid-State Drive. |
Abstract | ||
|---|---|---|
A NAND flash memory/storage-class memory (SCM) hybrid solid-state drive (SSD) can achieve higher performance than the conventional NAND flash-only SSD. Error-correcting codes (ECCs) are applied to the SSD to correct bit errors occurring inside the NAND flash and SCM. To correct more bit errors, the stronger ECC is required and the ECC latency increases. This paper evaluates the relation between th... |
Year | DOI | Venue |
|---|---|---|
2016 | 10.1109/TVLSI.2015.2496976 | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
Keywords | Field | DocType |
Ash,Error correction codes,Reliability,Decoding,Throughput,Writing,Bit error rate | Nand flash memory,Latency (engineering),Computer science,Real-time computing,NAND gate,Throughput,Decoding methods,Solid-state drive,Computer hardware,Bit error rate | Journal |
Volume | Issue | ISSN |
24 | 6 | 1063-8210 |
Citations | PageRank | References |
0 | 0.34 | 8 |
Authors | ||
5 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Shuhei Tanakamaru | 1 | 121 | 18.35 |
| Shogo Hosaka | 2 | 0 | 0.34 |
| Koh Johguchi | 3 | 43 | 7.87 |
| Hirofumi Takishita | 4 | 0 | 0.34 |
| Ken Takeuchi | 5 | 88 | 43.27 |