Title | ||
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Pinatubo: A Processing-In-Memory Architecture For Bulk Bitwise Operations In Emerging Non-Volatile Memories |
Abstract | ||
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Processing-in-memory (PIM) provides high bandwidth, massive parallelism, and high energy efficiency by implementing computations in main memory, therefore eliminating the overhead of data movement between CPU and memory. While most of the recent work focused on PIM in DRAM memory with 3D die-stacking technology, we propose to leverage the unique features of emerging non-volatile memory (NVM), such as resistance-based storage and current sensing, to enable efficient PIM design in NVM. We propose Pinatubo(1), a Processing In Non-volatile memory ArchiTecture for bUlk Bitwise Operations. Instead of integrating complex logic inside the cost-sensitive memory, Pinatubo redesigns the read circuitry so that it can compute the bitwise logic of two or more memory rows very efficiently, and support one-step multi-row operations. The experimental results on data intensive graph processing and database applications show that Pinatubo achieves a similar to 500x speedup, similar to 28000x energy saving on bitwise operations, and 1.12x overall speedup, 1.11x overall energy saving over the conventional processor. |
Year | DOI | Venue |
---|---|---|
2016 | 10.1145/2897937.2898064 | 2016 ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC) |
Field | DocType | Citations |
Registered memory,Interleaved memory,Semiconductor memory,Computer science,Non-volatile random-access memory,Parallel computing,Cache-only memory architecture,Computing with Memory,Real-time computing,Memory map,Memory architecture,Embedded system | Conference | 40 |
PageRank | References | Authors |
1.14 | 15 | 6 |
Name | Order | Citations | PageRank |
---|---|---|---|
Shuangchen Li | 1 | 636 | 36.82 |
Cong Xu | 2 | 1154 | 48.25 |
Qiaosha Zou | 3 | 74 | 5.63 |
Jishen Zhao | 4 | 638 | 38.51 |
Yu Lu | 5 | 51 | 1.99 |
Yuan Xie | 6 | 6430 | 407.00 |