Paper Info
Title
NVSim-VXs: an improved NVSim for variation aware STT-RAM simulation
Abstract
Spin-transfer torque random access memory (STT-RAM) recently received significant attentions for its promising characteristics in cache and memory applications. As an early-stage modeling tool, NVSim has been widely adopted for simulations of emerging nonvolatile memory technologies in computer architecture research, including STT-RAM, ReRAM, PCM, etc. In this work, we introduce a new member of NVSim family -- NVSim-VXs, which enables statistical simulation of STT-RAM for write performance, errors, and energy consumption. This enhanced model takes into account the impacts of parametric variabilities of CMOS and MTJ devices and the chip operating temperature. It is also calibrated with Monte-Carlo Simulations based on macro-magnetic and SPICE models, covering five technology nodes between 22nm and 90nm. NVSim-VXs strongly supports the fast-growing needs of STT-RAM research on reliability analysis and enhancement, announcing the next important stage of NVSim development.
Year
DOI
Venue
2016
10.1145/2897937.2898053
2016 ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC)
Keywords
Field
DocType
variation aware STT-RAM simulation,spin-transfer torque random access memory,cache,memory applications,computer architecture research,NVSim-VXs,statistical simulation,CMOS devices,MTJ devices,chip operating temperature,Monte-Carlo simulations,macro-magnetic model,SPICE model
Semiconductor memory,Cache,Computer science,Semiconductor device modeling,Electronic engineering,Non-volatile memory,Energy consumption,Computer memory,Resistive random-access memory,Embedded system,Random access
Conference
ISBN
Citations 
PageRank 
978-1-4503-4236-0
1
0.37
References 
Authors
9
7
Name
Order
Citations
PageRank
Enes Eken1183.60
Linghao Song219713.44
Ismail Bayram3253.39
Cong Xu4115448.25
Wujie Wen530030.61
Yuan Xie66430407.00
Yiran Chen73344259.09