Paper Info
Title
ERRCA: A buffer-efficient reconfigurable optical Network-on-Chip with permanent-error recognition
Abstract
Optical on-chip communication technology provides an unprecedented bandwidth. It allows to connect the hundreds or even thousands of processing elements expected in many core systems using optical Network-on-Chip. However, the required buffers to interface the electrical and optical layers are very large, since optical data-flow cannot be stored. Moreover, on-chip optical technologies have high defect rates which limits its usability severely. In order to address these challenges, this work presents a buffer-efficient reconfigurable optical Network-on-Chip with permanent-error recognition. The buffer-efficiency is achieved by a global credit-based arbitration with optical tokens. Further on, the architecture autonomously detects permanent errors in the optical components and configures the communication paths to avoid them. The work provides a thorough analysis at the gate-level of the area overhead incurred by the electrical sub-modules of the proposed system. It shows the practicability of the approach, experimental validated on a FPGA prototype. Compared with previously reported optical networks, it achieves an area reduction of up to 80% with almost identical performance.
Year
DOI
Venue
2016
10.1109/ReCoSoC.2016.7533909
2016 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)
Keywords
Field
DocType
3D-NoC,reconfigurable NoC,error detection,oNoC,SoC
Optical Transport Network,Optical burst switching,Optical transistor,Optical switch,Computer science,Passive optical network,Real-time computing,Optical performance monitoring,Optical cross-connect,Multiwavelength optical networking,Embedded system
Conference
ISBN
Citations 
PageRank 
978-1-5090-2521-3
0
0.34
References 
Authors
13
3
Name
Order
Citations
PageRank
Wolfgang Büter111.04
Dominic Oehlert252.84
Alberto García-Ortiz36619.23