Name
Affiliation
Papers
ALBERTO GARCÍA-ORTIZ
University of Bremen
49
Collaborators
Citations 
PageRank 
75
66
19.23
Referers 
Referees 
References 
173
935
340
Search Limit
100935
Title
Citations
PageRank
Year
Power, performance, area and cost analysis of memory-on-logic face-to-face bonded 3D processor designs00.342021
Misalignment-aware energy modeling of narrow buses for data encoding schemes00.342020
Poster - Event-triggered State Estimation Meets Duty Cycling Protocol.00.342019
Crosstalk optimization for through-silicon vias by exploiting temporal signal misalignment00.342019
Simulation environment for link energy estimation in networks-on-chip with virtual channels00.342019
EPKF: Energy Efficient Communication Schemes based on Kalman Filter for IoT10.372019
Edge effect aware low-power crosstalk avoidance technique for 3D integration00.342019
Coding-Based Low-Power Through-Silicon-Via Redundancy Schemes for Heterogeneous 3-D SoCs.00.342019
FLINT+: A runtime-configurable emulation-based stochastic timing analysis framework.10.372019
System-Level Optimization of Network-on-Chips for Heterogeneous 3D System-on-Chips00.342019
Hardware Acceleration of Kalman Filter for Leak Detection in Water Pipeline Systems using Wireless Sensor Network00.342019
Comparing vertical and horizontal SIMD vector processor architectures for accelerated image feature extraction.00.342019
A Logic-on-Memory Processor-System Design With Monolithic 3-D Technology10.402019
Reliability Improvements for Multiprocessor Systems by Health-Aware Task Scheduling00.342018
A Runtime-Scalable and Hardware-Accelerated Approach to On-Board Linear Unmixing of Hyperspectral Images.00.342018
Exploiting Temporal Misalignment to Optimize the Interconnect Performance for 3D Integration00.342018
Systematic Design of an Approximate Adder: The Optimized Lower Part Constant-OR Adder.80.672018
A comprehensive survey on wireless sensor node hardware platforms.20.642018
The Agamid design-space exploration framework00.342018
Edge effects on the TSV array capacitances and their performance influence.10.352018
High-Level Energy Estimation for Submicrometric TSV Arrays.50.472017
Area and power savings via asymmetric organization of buffers in 3D-NoCs for heterogeneous 3D-SoCs.10.382017
EARNPIPE: A Testbed for Smart Water Pipeline Monitoring Using Wireless Sensor Network.00.342016
ERRCA: A buffer-efficient reconfigurable optical Network-on-Chip with permanent-error recognition00.342016
Modeling Optimal Dynamic Scheduling for Energy-Aware Workload Distribution in Wireless Sensor Networks00.342016
Synthesis Of Approximate Coders For On-Chip Interconnects Using Reversible Logic80.662016
PKF-ST: A Communication Cost Reduction Scheme Using Spatial and Temporal Correlation for Wireless Sensor Networks.00.342016
Analysis of PKF: A Communication Cost Reduction Scheme for Wireless Sensor Networks.20.412016
A programmable and reconfigurable core for binary image processing00.342016
A rapid prototyping framework for nano-photonic accelerators00.342015
Message from the chairs00.342015
Conservatively Analyzing Transient Faults00.342015
Transaction Level Analysis for a Clustered and Hardware-Enhanced Task Manager on Homogeneous Many-Core Systems.00.342015
The DRACON Embedded Many-Core: Hardware-Enhanced Run-Time Management Using a Network of Dedicated Control Nodes00.342015
An altruistic compression-scheduling scheme for cluster-based wireless sensor networks20.412015
A transaction-level framework for design-space exploration of hardware-enhanced operating systems20.392014
Accurate Energy-Aware Workload Distribution For Wireless Sensor Networks Using A Detailed Communication Energy Cost Model20.412014
Non-intrusive DVFS emulation in gem5 with application to self-aware architectures00.342014
DCM: an IP for the autonomous control of optical and electrical reconfigurable NoCs10.362014
Pkf: A Communication Cost Reduction Schema Based On Kalman Filter And Data Prediction For Wireless Sensor Networks10.362013
A review on wireless sensor network for water pipeline monitoring applications80.572013
Low-Power Coding For Networks-On-Chip With Virtual Channels90.692009
Signal Activity Analysis For High-Level Power Estimation In Time-Shared Linear Systems00.342007
A high-level compact pattern-dependent delay model for high-speed point-to-point interconnects10.372006
Evaluation and Run-Time Optimization of On-chip Communication Structures in Reconfigurable Architectures00.342003
Moment-Based Power Estimation in Very Deep Submicron Technologies40.542003
A multi-path high speed Viterbi decoder.30.452003
Efficient estimation of signal transition activity in MAC architectures10.382002
Prototyping of a High Performance Generic Viterbi Decoder20.472002