Abstract | ||
---|---|---|
We present a new DVFS technique for network-on-chip (NoC) that adjusts the voltage/frequency scales of routers according to memory-access characteristics of application running on the CMP. The memory characteristics are periodically profiled, reflecting both resource-access density in the network and memory-access criticality for application performance. The network conducts per-router voltage/frequency tuning using the memory-access density information while it performs priority-based switch allocation to speed up critical packets and avoid starvation using the memory-criticality information. Compared to a latest per-router DVFS approach, benchmark experiments demonstrate that our memory-access characteristics aware DVFS technique achieves not only better power saving, energy-delay product, but also enhanced network and application performance. |
Year | Venue | Field |
---|---|---|
2016 | PROCEEDINGS OF THE 2016 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE) | Computer science,Real-time computing,Artificial intelligence,Criticality,Benchmark (computing),Robotics,Speedup,Resource management,Parallel computing,Voltage,Network packet,Network on a chip,Embedded system |
DocType | ISSN | Citations |
Conference | 1530-1591 | 2 |
PageRank | References | Authors |
0.39 | 10 | 2 |
Name | Order | Citations | PageRank |
---|---|---|---|
Yuan Yao | 1 | 17 | 4.67 |
Zhonghai Lu | 2 | 1063 | 100.12 |