| A Low Bit-Width LDPC Min-Sum Decoding Scheme for NAND Flash | 0 | 0.34 | 2022 |
| Redundancy Reduction for Sensor Deployment in Prosthetic Socket: A Case Study | 0 | 0.34 | 2022 |
| Base-2 Softmax Function: Suitability for Training and Efficient Hardware Implementation | 0 | 0.34 | 2022 |
| Huicore: A Generalized Hardware Accelerator for Complicated Functions | 0 | 0.34 | 2022 |
| Optimal Sprinting Pattern in Thermal Constrained CMPs | 0 | 0.34 | 2021 |
| Symmetric-Mapping LUT-Based Method and Architecture for Computing X<sup>Y</sup>-Like Functions | 2 | 0.39 | 2021 |
| Low-Complexity High-Precision Method and Architecture for Computing the Logarithm of Complex Numbers | 1 | 0.36 | 2021 |
| A CORDIC-Based Architecture with Adjustable Precision and Flexible Scalability to Implement Sigmoid and Tanh Functions | 0 | 0.34 | 2020 |
| BlockHammer: Improving Flash Reliability by Exploiting Process Variation Aware Proactive Failure Prediction | 1 | 0.38 | 2020 |
| SCORE: A Novel Scheme to Efficiently Cache Overlong ECCs in NAND Flash Memory. | 0 | 0.34 | 2019 |
| Bit-flipping Schemes upon MLC Flash: Investigation, Implementation, and Evaluation | 0 | 0.34 | 2019 |
| Hardware Acceleration of Multilayer Perceptron Based on Inter-Layer Optimization | 0 | 0.34 | 2019 |
| Toward Fpga Security In Iot: A New Detection Technique For Hardware Trojans | 1 | 0.39 | 2019 |
| RBER-Aware Lifetime Prediction Scheme for 3D-TLC NAND Flash Memory. | 1 | 0.38 | 2019 |
| Advance Virtual Channel Reservation | 0 | 0.34 | 2019 |
| Security-aware Task Mapping Reducing Thermal Side Channel Leakage in CMPs | 0 | 0.34 | 2019 |
| An Adaptive Resource Provisioning Scheme for Industrial SDN Networks. | 0 | 0.34 | 2019 |
| ANN Based Admission Control for On-Chip Networks | 1 | 0.37 | 2019 |
| SSS: Self-aware System-on-chip Using a Static-dynamic Hybrid Method | 0 | 0.34 | 2019 |
| Characterizing 3D Floating Gate NAND Flash: Observations, Analyses, and Implications. | 5 | 0.52 | 2018 |
| Characterizing 3D Charge Trap NAND Flash: Observations, Analyses and Applications | 1 | 0.34 | 2018 |
| Exploiting Minipage-Level Mapping to Improve Write Efficiency of NAND Flash | 0 | 0.34 | 2018 |
| Towards Qos-Aware Service-Oriented Communication In E/E Automotive Architectures | 0 | 0.34 | 2018 |
| A New Parallel CODEC Technique for CDMA NoCs. | 0 | 0.34 | 2018 |
| xMAS-Based QoS Analysis Methodology. | 1 | 0.37 | 2018 |
| Composable Worst-Case Delay Bound Analysis Using Network Calculus. | 3 | 0.39 | 2018 |
| A Variable-Size FFT Hardware Accelerator Based on Matrix Transposition. | 2 | 0.40 | 2018 |
| RoB-Router : A Reorder Buffer Enabled Low Latency Network-on-Chip Router. | 0 | 0.34 | 2018 |
| WARD: Wear Aware RAID Design Within SSDs. | 1 | 0.39 | 2018 |
| Program error rate-based wear leveling for NAND flash memory. | 0 | 0.34 | 2018 |
| iNPG: Accelerating Critical Section Access with In-network Packet Generation for NoC Based Many-Cores | 1 | 0.36 | 2018 |
| SSS: self-aware system-on-chip using static-dynamic hybrid method (work-in-progress) | 0 | 0.34 | 2017 |
| Dynamic Traffic Regulation in NoC-Based Systems. | 2 | 0.38 | 2017 |
| Extending Real-Time Analysis for Wormhole NoCs. | 7 | 0.54 | 2017 |
| Round-trip DRAM Access Fairness in 3D NoC-based Many-core Systems. | 0 | 0.34 | 2017 |
| Lifetime adaptive ECC in NAND flash page management. | 3 | 0.37 | 2017 |
| Characterizing 3D Floating Gate NAND Flash. | 6 | 0.49 | 2017 |
| A Tool for xMAS-Based Modeling and Analysis of Communication Fabrics in Simulink. | 1 | 0.37 | 2017 |
| Marginal Performance: Formalizing and Quantifying Power Over/Under Provisioning in NoC DVFS. | 0 | 0.34 | 2017 |
| Multi-bit transient fault control for NoC links using 2D fault coding method | 4 | 0.41 | 2016 |
| Elastic Management and QoS Provisioning Scheme for Adaptable Multi-core Protocol Processing Architecture | 1 | 0.36 | 2016 |
| Opportunistic Competition Overhead Reduction for Expediting Critical Section in NoC Based CMPs. | 2 | 0.37 | 2016 |
| Aggregate Flow-Based Performance Fairness in CMPs. | 1 | 0.35 | 2016 |
| Memory-Access Aware Dvfs For Network-On-Chip In Cmps | 2 | 0.39 | 2016 |
| A 101.4 GOPS/W Reconfigurable and Scalable Control-centric Embedded Processor for Domain-specific Applications | 0 | 0.34 | 2016 |
| Service-Guaranteed Multi-port Packet Memory for Parallel Protocol Processing Architecture. | 2 | 0.38 | 2016 |
| Real-Time Analysis for Wormhole NoC: Revisited and Revised. | 6 | 0.43 | 2016 |
| Performance analysis of homogeneous on-chip large-scale parallel computing architectures for data-parallel applications | 1 | 0.36 | 2015 |
| MultiCS: Circuit switched NoC with multiple sub-networks and sub-channels | 4 | 0.42 | 2015 |
| Backlog Bound Analysis for Virtual-Channel Routers | 0 | 0.34 | 2015 |
