Name
Title | ||
|---|---|---|
A Built-In Test Circuit For Electrical Interconnect Testing Of Open Defects In Assembled Pcbs |
Abstract | ||
|---|---|---|
In this paper, a built-in test circuit for an electrical interconnect test method is proposed to detect an open defect occurring at an interconnect between an IC and a printed circuit board. The test method is based on measuring the supply current of an inverter gate in the test circuit. A time-varying signal is provided to an interconnect as a test signal by the built-in test circuit. In this paper, the test circuit is evaluated by SPICE simulation and by experiments with a prototyping IC. The experimental results reveal that a hard open defect is detectable by the test method in addition to a resistive open defect and a capacitive open one at a test speed of 400 kHz. |
Year | DOI | Venue |
|---|---|---|
2016 | 10.1587/transinf.2015EDP7273 | IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS |
Keywords | Field | DocType |
electrical test, built-in test circuit, open defect, interconnect test, design for testability | Design for testing,Interconnect test,Computer science,Interconnection,Embedded system | Journal |
Volume | Issue | ISSN |
E99D | 11 | 1745-1361 |
Citations | PageRank | References |
0 | 0.34 | 2 |
Authors | ||
7 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Widianto | 1 | 0 | 0.34 |
| Masaki Hashizume | 2 | 98 | 27.83 |
| Shohei Suenaga | 3 | 0 | 0.34 |
| Hiroyuki Yotsuyanagi | 4 | 2 | 1.41 |
| A Ono | 5 | 21 | 31.32 |
| Shyue-Kung Lu | 6 | 259 | 34.09 |
| Zvi S. Roth | 7 | 110 | 19.78 |