Name
Title | ||
|---|---|---|
Optimizing Latency, Energy, and Reliability of 1T1R ReRAM Through Cross-Layer Techniques. |
Abstract | ||
|---|---|---|
Resistive RAM (ReRAM) has fast access time, ultra-low stand-by power and high reliability, making it a viable memory technology to replace DRAM in main memory. The 1-transistor-1-resistor (1T1R) ReRAM array has density comparable to that of a DRAM array and the advantages of lower programming energy and higher reliability compared to the ReRAM cross-point array. However, 1T1R ReRAM array has signi... |
Year | DOI | Venue |
|---|---|---|
2016 | 10.1109/JETCAS.2016.2547745 | IEEE Journal on Emerging and Selected Topics in Circuits and Systems |
Keywords | Field | DocType |
Computer architecture,Random access memory,Microprocessors,Programming,Integrated circuit reliability,Resistance | Dram,Instructions per cycle,Access time,Latency (engineering),Computer science,Voltage,Electronic engineering,Real-time computing,Computer hardware,Energy consumption,Resistive random-access memory,Bit error rate | Journal |
Volume | Issue | ISSN |
6 | 3 | 2156-3357 |
Citations | PageRank | References |
4 | 0.43 | 10 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Manqing Mao | 1 | 17 | 2.42 |
| Yu Cao | 2 | 2765 | 245.91 |
| Shimeng Yu | 3 | 490 | 56.22 |
| Chaitali Chakrabarti | 4 | 1978 | 184.17 |