Name
Abstract | ||
|---|---|---|
In this work we present randomly optimized grid graphs that maximize the performance measure, such as diameter and average shortest path length (ASPL), with subject to limited edge length on a grid surface. We also provide theoretical lower bounds of the diameter and the ASPL, which prove optimality of our randomly optimized grid graphs. We further present a diagonal grid layout that significantly reduces the diameter compared to the conventional one under the edge-length limitation. We finally show their applications to three case studies of off-and on-chip interconnection networks. Our design efficiently improves their performance measures, such as end-to-end communication latency, network power consumption, cost, and execution time of parallel benchmarks. |
Year | DOI | Venue |
|---|---|---|
2016 | 10.1109/ICPP.2016.46 | 2016 45th International Conference on Parallel Processing (ICPP) |
Keywords | Field | DocType |
Network,Graph Theory | Graph theory,Average path length,Shortest path problem,Computer science,Grid network,Parallel computing,Network topology,Latency (engineering),Lattice graph,Grid,Distributed computing | Conference |
ISSN | ISBN | Citations |
0190-3918 | 978-1-5090-2824-5 | 5 |
PageRank | References | Authors |
0.47 | 11 | 6 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Koji Nakano | 1 | 1165 | 118.13 |
| Daisuke Takafuji | 2 | 31 | 6.12 |
| Satoshi Fujita | 3 | 46 | 18.99 |
| Hiroki Matsutani | 4 | 576 | 62.07 |
| Ikki Fujiwara | 5 | 127 | 16.00 |
| Michihiro Koibuchi | 6 | 726 | 74.68 |