Name
Affiliation
Papers
KOJI NAKANO
Nagoya Institute of Technology, Nagoya, Japan
174
Collaborators
Citations 
PageRank 
133
1165
118.13
Referers 
Referees 
References 
1053
1286
1522
Search Limit
1001000
Title
Citations
PageRank
Year
Preface: Special issued on the Sixth International Symposium on Networking and Computing.00.342019
FIFO-Based Hardware Sorters for High Bandwidth Memory10.372019
Folded Bloom Filter for High Bandwidth Memory, with GPU Implementations00.342019
Introduction to APDCM 201900.342019
Bulk execution of Euclidean algorithms on the CUDA-enabled GPU.00.342016
Bitwise Parallel Bulk Computation on the GPU, with Application to the CKY Parsing for Context-Free Grammars20.392016
Deterministic Construction of Regular Geometric Graphs with Short Average Distance and Limited Edge Length.00.342016
An Efficient Implementation of LZW Compression in the FPGA.00.342016
Efficient Implementation of FDFM Approach for Euclidean Algorithms on the FPGA.00.342016
Randomly Optimized Grid Graph for Low-Latency Interconnection Networks50.472016
An Efficient Implementation of LZW Decompression in the FPGA30.452016
Preface: Special issue on the Third International Symposium on Computing and Networking.00.342016
Optimal Parallel Hardware K-Sorter and Top K-Sorter, with FPGA Implementations20.412015
Asterisk PBX Capacity Evaluation10.372015
A Warp-Synchronous Implementation for Multiple-Length Multiplication on the GPU.00.342015
Optimality of Fundamental Parallel Algorithms on the Hierarchical Memory Machine, with GPU Implementation00.342015
Efficient GPU Implementations for the Conway's Game of Life.10.362015
A Flexible-Length-Arithmetic Processor Based on FDFM Approach in FPGAs.00.342015
A Fast Approximate String Matching Algorithm on GPU.20.402015
GPU-Accelerated Digital Halftoning by the Local Exhaustive Search00.342015
Using Pulse/Tone Signals As An Alternative To Boost Channel Reservation On Directional Communications10.382015
A GPU Implementation of Clipping-Free Halftoning Using the Direct Binary Search.40.462014
APDCM Introduction and Committees00.342014
Offline Permutation On The Cuda-Enabled Gpu00.342014
An Efficient Implementation of the Gradient-Based Hough Transform Using DSP Slices and Block RAMs on the FPGA30.512014
Thorough Evaluation of GPU Shared Memory Load and Store Instructions20.402014
Random Address Permute-Shift Technique for the Shared Memory on GPUs00.342014
Asynchronous Memory Machine Models with Barrier Synchronization10.362014
GPU-Accelerated Verification of the Collatz Conjecture.00.342014
Template Matching Using DSP Slices on the FPGA50.512013
The Hierarchical Memory Machine Model for GPUs30.442013
Offline Permutation Algorithms On The Discrete Memory Machine With Performance Evaluation On The Gpu90.602013
Accelerating computation of Euclidean distance map using the GPU with efficient memory access60.512013
ASCII Art Generation Using the Local Exhaustive Search on the GPU100.632013
Sequential Memory Access on the Unified Memory Machine with Application to the Dynamic Programming80.552013
The super warp architecture with random address shift30.502013
An optimal parallel prefix-sums algorithm on the memory machine models for GPUs151.012012
The Parallel FDFM Processor Core Approach for CRT-based RSA Decryption.90.592012
A Rewriting Approach to Replace Asynchronous ROMs with Synchronous Ones for the Circuits with Cycles.00.342012
An Implementation of Conflict-Free Offline Permutation on the GPU20.402012
Efficient Implementations of the Approximate String Matching on the Memory Machine Models90.682012
An Algorithm to Remove Asynchronous ROMs in Circuits with Cycles00.342011
Efficient Exhaustive Verification of the Collatz Conjecture using DSP blocks of Xilinx FPGAs.100.622011
The Parallel FDFM Processor Core Approach for Neural Networks20.412011
Accelerating the Dynamic Programming for the Matrix Chain Product on the GPU241.552011
Fast Ellipse Detection Algorithm Using Hough Transform on the GPU181.172011
A Graph Rewriting Approach For Converting Asynchronous Roms Into Synchronous Ones10.372011
Low-Latency Connected Component Labeling Using An Fpga100.532010
Deafness Resilient Mac Protocol For Directional Communications30.462010
A Perspective on the Experiential Learning of Computer Architecture.00.342010
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