Title
Impact of VT and Body-Biasing on Resistive Short Detection in 28nm UTBB FDSOI -- LVT and RVT Configurations
Abstract
In this paper, we analyse the impact of voltage, temperature and body-biasing on the detection of resistive short defects for low-VT (LVT) and regular-VT (RVT) configurations of a 28nm UTBB FDSOI (Ultra-Thin Body & BOX Fully-Depleted Silicon-on-Insulator) technology. We implemented a similar design in each configuration and compared their electrical behaviors with the same resistive short defect. In addition, this work focuses on determining the individual as well as the combined improvements brought by voltage, temperature and body-biasing settings for achieving the maximum coverage of the resistive short defects.
Year
DOI
Venue
2016
10.1109/ISVLSI.2016.102
2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
Keywords
Field
DocType
Resistive short defects,Testability,FDSOI,Body Biasing,LVT,RVT
Testability,Silicon on insulator,Logic gate,Resistive touchscreen,Voltage,Engineering,Transistor,Threshold voltage,Electrical engineering,Biasing
Conference
ISSN
ISBN
Citations 
2159-3469
978-1-4673-9040-8
2
PageRank 
References 
Authors
0.41
2
5
Name
Order
Citations
PageRank
Amit Karel131.78
Mariane Comte2617.44
Jean Marc Gallière334.15
Florence Azaïs4466.58
Michel Renovell574996.46