Paper Info
Title
Hardware Design Automation of Convolutional Neural Networks
Abstract
Convolutional Neural Networks (CNNs) are a variation of feed-forward Neural Networks inspired by the biological process in the visual cortex of animals. The interest in this supervised learning algorithm has rapidly grown in many fields like image and video recognition and natural language processing. Nowadays they have become the state of the art in various applications like mobile robot vision, video surveillance and Big Data analytics. The specific computation pattern of CNNs results to be highly suitable for hardware acceleration, in fact different types of accelerators have been proposed based on GPU, Field Programmable Gate Array (FPGA) and ASIC. In particular, in the embedded systems context, due to real time and power consumption challenges, it is crucial to find the right tradeoff between performance, energy efficiency, fast development round and cost. This work proposes a framework meant as a tool for the user to accelerate and simplify the design and the implementation of CNNs on FPGAs by leveraging High Level Synthesis, still providing a certain level of customization of the hardware design.
Year
DOI
Venue
2016
10.1109/ISVLSI.2016.101
2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
Keywords
Field
DocType
Field Programmable Gate Arrays,Convolutional Neural Networks,Design methodology,Heterogeneous MPSoCs
Convolutional code,Convolutional neural network,Computer science,High-level synthesis,Field-programmable gate array,Electronic design automation,Hardware acceleration,Artificial neural network,Computer hardware,Big data
Conference
ISSN
ISBN
Citations 
2159-3469
978-1-4673-9040-8
1
PageRank 
References 
Authors
0.39
13
6
Name
Order
Citations
PageRank
Andrea Solazzo150.91
Emanuele Del Sozzo2409.12
Irene De Rose310.39
Matteo De Silvestri410.39
Gianluca C. Durelli5213.86
Marco D. Santambrogio677191.15