Marco D. Santambrogio

Author Info

Name	Affiliation	Papers
MARCO D. SANTAMBROGIO	Electronics Department, University of Alcala, Escuela Politecnica Superior, Ctra. Madrid Barcelona km. 33.6, 28871, Alcalá de Henares, Madrid, Spain	180
Collaborators	Citations	PageRank
333	771	91.15
Referers	Referees	References
1668	2659	1340

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Publications (100 rows)

Collaborators (100 rows)

Referers (100 rows)

Referees (100 rows)

Title	Citations	PageRank	Year
Towards Graph Machine Learning for Smart Grid Knowledge Graphs in Industrial Scenarios	0	0.34	2021
A Practical Account of Designing a Support Tool for an Educational Experience	0	0.34	2021
Exploring the Runtime Performance of Knowledge Graph Embedding Methods	0	0.34	2021
Expertise and trade-offs in competence transfer from academia to industry: a successful case study	0	0.34	2021
Fraud Prevention and Detection on Heterogeneous Information Networks with Deep Graph Infomax	0	0.34	2021
On How FPGAs are Changing the Computer Security Panorama: An Educational Survey	1	0.48	2021
GPU accelerated partial order multiple sequence alignment for long reads self-correction	0	0.34	2020
A CAD-based methodology to optimize HLS code via the Roofline model.	0	0.34	2020
Power consumption management under a low-level performance constraint in the Xen hypervisor	1	0.37	2020
A faster approach to ECG analysis in emergency situations	0	0.34	2020
Efficient Embedded Machine Learning applications using Echo State Networks.	0	0.34	2020
PRESTO: a latency-aware power-capping orchestrator for cloud-native microservices	1	0.37	2020
EchoBay: Design and Optimization of Echo State Networks under Memory and Time Constraints	0	0.34	2020
SmartBlackBox: Enhancing Driver's Safety Via Real-Time Machine Learning on IoT Insurance Black-Boxes	0	0.34	2020
Solving write conflicts in GPU-accelerated graph computation: A PageRank case-study	0	0.34	2019
circFA: a FPGA-based circular RNA aligner	0	0.34	2019
Fog Acceleration through Reconfigurable Devices	1	0.40	2019
Exploring transductive and inductive methods for vertex embedding in biological networks	0	0.34	2019
Automating Lung Cancer Identification in PET/CT Imaging	0	0.34	2018
FIDA: A Framework to Automatically Integrate FPGA Kernels Within Data-Science Applications	0	0.34	2018
Towards a Performance-Aware Power Capping Orchestrator for the Xen Hypervisor.	0	0.34	2018
Extra: An Open Platform For Reconfigurable Architectures	0	0.34	2018
Enabling Power-Awareness for the Xen Hypervisor.	0	0.34	2018
HLS Support for Polymorphic Parallel Memories	0	0.34	2018
Exploiting FPGAs from Higher Level Languages A Signal Analysis Case Study	1	0.41	2017
Floorplanning Automation for Partial-Reconfigurable FPGAs via Feasible Placements Generation.	5	0.55	2017
FPGA-based muscle synergy extraction for surface EMG gesture classification.	1	0.43	2017
A CAD Open Platform for High Performance Reconfigurable Systems in the EXTRA Project	2	0.39	2017
A Feedback-Based Design Space Exploration Subsystem for the Automation of Architectures Synthesis on Proprietary FPGA Toolchains	0	0.34	2017
Introduction to RAW Workshop	0	0.34	2017
Ruleset Minimization in Multi-tenant Smart Buildings	1	0.35	2016
Resource-Efficient Scheduling for Partially-Reconfigurable FPGA-Based Systems	6	0.53	2016
A Self-Adaptive Approach To Efficiently Manage Energy And Performance In Tomorrow'S Heterogeneous Computing Systems	1	0.37	2016
Autonomic thread scaling library for QoS management.	0	0.34	2016
ProFAX: A hardware acceleration of a protein folding algorithm	0	0.34	2016
Hardware Design Automation of Convolutional Neural Networks	1	0.39	2016
A Software Cache Partitioning System for Hash-Based Caches.	1	0.35	2016
Special Issue on: Multicore and Many-core Architectures for Future Generation Embedded Systems	0	0.34	2016
Scala-Based Domain-Specific Language for Creating Accelerator-Based SoCs	1	0.36	2016
Parallel Protein Identification Using an FPGA-Based Solution	0	0.34	2016
A polyhedral model-based framework for dataflow implementation on FPGA devices of iterative stencil loops.	7	0.56	2016
Using just-in-time code generation for transparent resource management in heterogeneous systems	0	0.34	2016
On How to Accelerate Iterative Stencil Loops: A Scalable Streaming-Based Approach	12	0.80	2016
Workload-aware power optimization strategy for asymmetric multiprocessors	8	0.49	2016
RAW Introduction and Committees	0	0.34	2016
On How to Improve FPGA-Based Systems Design Productivity via SDAccel	13	0.91	2016
Sink state analysis in multi-tenant smart buildings	0	0.34	2016
On how to extract breathing rate from PPG signal using wearable devices	1	0.41	2015
Thermal-aware floorplanning for partially-reconfigurable FPGA-based systems	3	0.40	2015
Relocation-Aware Floorplanning for Partially-Reconfigurable FPGA-Based Systems	1	0.34	2015

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