Abstract | ||
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The constantly increasing need for I/O bandwidth push electrical backplane links to data rates of 50Gb/s and above. Although board materials have improved significantly, backplane links are increasingly limited by signal attenuation while suffering from ISI, jitter, device noise and cross-talk. In this paper we summarize these limitations, and show possible directions to cope with them in order to further extend the achievable data rate. |
Year | Venue | Keywords |
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2016 | Proceedings of the European Solid-State Circuits Conference | wireline,IO link,backplane,equalization,CTLE,feed-forward equalizer,FFE,decision-feedback equalizer,DFE,MLSE,ADC,56G,Ethernet,TCM,THP,PAM-4 |
Field | DocType | ISSN |
Backplane,Computer science,Electronic engineering,Bandwidth (signal processing),Data rate,Jitter,Attenuation | Conference | 1930-8833 |
Citations | PageRank | References |
0 | 0.34 | 12 |
Authors | ||
11 |
Name | Order | Citations | PageRank |
---|---|---|---|
Thomas Toifl | 1 | 275 | 48.02 |
Matthias Braendli | 2 | 158 | 24.28 |
Alessandro Cevrero | 3 | 107 | 16.21 |
Pier Andrea Francese | 4 | 138 | 25.33 |
Marcel A. Kossel | 5 | 179 | 33.86 |
Lukas Kull | 6 | 141 | 18.63 |
Danny Luu | 7 | 16 | 7.55 |
Christian Menolfi | 8 | 245 | 41.54 |
Thomas Morf | 9 | 244 | 42.54 |
Ilter Özkaya | 10 | 16 | 5.72 |
Hazar Yueksel | 11 | 7 | 4.15 |