Name
Abstract | ||
|---|---|---|
Context switch is an essential feature of modern operating systems. The purpose of context switch is to provide concurrency processing of multiple programs. However, the backup and reload procedures due to context switch are time consuming. In this work, we propose a Racetrack-memory SRAM hybrid (RSH) cell design, which can be used to replace current SRAM cells in caches, to reduce the overhead of context switch. Using RSH reduces the overhead of context switch by 65.2% on average with 34% area overhead, compared with traditional SRAM designs. |
Year | DOI | Venue |
|---|---|---|
2016 | 10.1145/2950067.2950070 | 2016 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH) |
Keywords | Field | DocType |
Racetrack Memory,Context Switch,Cache | Computer science,Concurrency,Cache,Parallel computing,Static random-access memory,Cell design,Racetrack memory,Backup,Context switch,Embedded system | Conference |
ISSN | ISBN | Citations |
2327-8218 | 978-1-4673-8927-3 | 0 |
PageRank | References | Authors |
0.34 | 4 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Weiqi Zhang | 1 | 48 | 2.97 |
| Chao Zhang | 2 | 423 | 38.17 |
| Guangyu Sun | 3 | 1920 | 111.55 |