Name
Title | ||
|---|---|---|
Emulation Infrastructure for the Evaluation of Hardware Assertions for Post-silicon Validation |
Abstract | ||
|---|---|---|
The objective of post-silicon validation is to identify design errors that remain undetected after pre-silicon verification and, therefore, manifest themselves in the silicon prototypes. These errors are often associated with the subtle interactions between the electrical states of the systems and commonly manifest in the logic domain as bit-flips in flip-flops. They occur under unique operating c... |
Year | DOI | Venue |
|---|---|---|
2017 | 10.1109/TVLSI.2017.2658564 | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
Keywords | Field | DocType |
Hardware,Silicon,Emulation,Measurement,Systematics,Manufacturing,Observability | Crash,Observability,Post-silicon validation,Computer science,Assertion,Real-time computing,Electronic engineering,Emulation,Hardware emulation | Journal |
Volume | Issue | ISSN |
25 | 6 | 1063-8210 |
Citations | PageRank | References |
1 | 0.40 | 26 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Pouya Taatizadeh | 1 | 11 | 2.26 |
| Nicola Nicolici | 2 | 807 | 59.91 |