Paper Info
Title
A Quantitative Method to Data Reuse Patterns of SIMT Applications.
Abstract
Understanding data reuse patterns of a computing system is crucial to effective design optimization. The emerging Single Instruction Multiple Threads (SIMT) processor adopts a programming model that is fundamentally disparate from conventional scalar processors. There is a lack of analytical approaches to quantify the data reuse of SIMT applications. This paper presents a quantitative method to study the data reuse inherent to SIMT applications. A metric, Data Reuse Degree, is defined to measure the amount of reused data between memory references, and associate each data reuse degree to a temporal distance representing the virtual time of the execution process. The experiments are performed on an abstracted SIMT processor that considers the programming model and runtime specifics. The experiments illustrate diverse data reuse patterns of SIMT applications and explore the impacts of architectural limitations.
Year
DOI
Venue
2016
10.1109/LCA.2015.2491279
Computer Architecture Letters
Keywords
Field
DocType
Instruction sets,Memory management,Graphics processing units,Measurement,Parallel processing,Cache memory
Computer architecture,Scalar processor,Programming paradigm,CPU cache,Computer science,Instruction set,Parallel computing,Real-time computing,Memory management,Single instruction, multiple threads,Computing systems,Data reuse
Journal
Volume
Issue
ISSN
15
2
1556-6056
Citations 
PageRank 
References 
0
0.34
0
Authors
3
Name
Order
Citations
PageRank
Bo-Cheng Charles Lai117719.25
Luis Garrido Platero200.34
Hsien-Kai Kuo3215.81