Name
Abstract | ||
|---|---|---|
Memory capacity continues to increase, and many semiconductor manufacturing companies are trying to stack memory dice for larger memory capacities. Therefore, built-in redundancy analysis (BIRA) is of utmost importance because the probability of fault occurrence increases with a larger memory capacity. A traditional spare structure that consists of simple rows and columns is somewhat inadequate fo... |
Year | DOI | Venue |
|---|---|---|
2017 | 10.1109/TVLSI.2016.2606499 | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
Keywords | Field | DocType |
Maintenance engineering,Hardware,Redundancy,Resource management,Memory management,Heuristic algorithms,Built-in self-test | Row and column spaces,Spare part,Computer science,Semiconductor device fabrication,Real-time computing,Memory management,Redundancy (engineering),Computer hardware,Maintenance engineering,Stack-based memory allocation,Built-in self-test | Journal |
Volume | Issue | ISSN |
25 | 3 | 1063-8210 |
Citations | PageRank | References |
7 | 0.56 | 23 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jooyoung Kim | 1 | 7 | 1.57 |
| Woosung Lee | 2 | 7 | 0.56 |
| Keewon Cho | 3 | 18 | 4.64 |
| Sungho Kang | 4 | 436 | 78.44 |