Name
Abstract | ||
|---|---|---|
A chain-based coupling delay estimation method for through-silicon-vias (TSVs) in 3-D integrated circuits is proposed. Existing works target the worst case scenarios and this leads to inaccurate TSV coupling delay estimations, as the worst case may not occur during normal operation. The proposed method calculates the TSV coupling delay using simulation-based switching data. In addition, our TSV ch... |
Year | DOI | Venue |
|---|---|---|
2017 | 10.1109/TVLSI.2016.2623810 | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
Keywords | Field | DocType |
Through-silicon vias,Couplings,Delays,Switches,Degradation,Estimation | Coupling,Computer science,Electronic engineering,Real-time computing,Through-silicon via,Integrated circuit | Journal |
Volume | Issue | ISSN |
25 | 3 | 1063-8210 |
Citations | PageRank | References |
0 | 0.34 | 6 |
Authors | ||
5 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jaewon Jang | 1 | 1 | 1.38 |
| Minho Cheong | 2 | 2 | 1.08 |
| Jinho Ahn | 3 | 83 | 27.05 |
| Sung Kyu Lim | 4 | 1688 | 168.71 |
| Sungho Kang | 5 | 436 | 78.44 |