Title
Delay Analysis for Current Mode Threshold Logic Gate Designs.
Abstract
Current mode is a popular CMOS-based implementation of threshold logic functions, where the gate delay depends on the sensor size. This paper presents a new implementation of current mode threshold functions for improved gate delay and switching energy. An analytical method is also proposed in order to identify quickly the sensor size that minimizes the gate delay. Simulation results on different ...
Year
DOI
Venue
2017
10.1109/TVLSI.2016.2608953
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Keywords
Field
DocType
MOSFET,Logic gates,Clocks,Delays,Threshold voltage,Logic functions
Delay calculation,Delay line oscillator,Logic gate,Computer science,NAND gate,CMOS,Electronic engineering,Real-time computing,MOSFET,Threshold voltage,Electrical engineering,Imagination
Journal
Volume
Issue
ISSN
25
3
1063-8210
Citations 
PageRank 
References 
2
0.42
9
Authors
3
Name
Order
Citations
PageRank
Chandra Babu Dara1132.01
Themistoklis Haniotakis29716.09
Spyros Tragoudas362588.87