Abstract | ||
---|---|---|
Near-threshold operations provide a powerful knob for improving energy efficiency and alleviating on-chip power densities. This article explores the impact of newest FinFET CMOS technologies (from 40 to 7 nm) on near-threshold computing in terms of performance and energy efficiency. |
Year | DOI | Venue |
---|---|---|
2017 | 10.1109/MDAT.2016.2630303 | IEEE Design & Test |
Keywords | Field | DocType |
FinFETs,Integrated circuit modeling,Parallel processing,Delays,Threshold voltage,Performance evaluation,Energy efficiency,Silicon,Density measurement,Voltage control | Computer science,Voltage control,Efficient energy use,Parallel processing,CMOS,Electronic engineering,Electrical engineering,Threshold voltage,Scalability | Journal |
Volume | Issue | ISSN |
34 | 2 | 2168-2356 |
Citations | PageRank | References |
1 | 0.36 | 6 |
Authors | ||
9 |
Name | Order | Citations | PageRank |
---|---|---|---|
Nathaniel Ross Pinckney | 1 | 155 | 10.34 |
Supreet Jeloka | 2 | 41 | 6.41 |
Ronald G. Dreslinski | 3 | 1258 | 81.02 |
Trevor Mudge | 4 | 6139 | 659.74 |
Dennis Sylvester | 5 | 5295 | 535.53 |
David Blaauw | 6 | 8916 | 823.47 |
Lucian Shifren | 7 | 31 | 3.55 |
Brian Cline | 8 | 91 | 11.28 |
Saurabh Sinha | 9 | 195 | 21.88 |