Title
High-Density 4T SRAM Bitcell in 14-nm 3-D CoolCube Technology Exploiting Assist Techniques.
Abstract
In this paper, we present a high-density four-transistor (4T) static random access memory (SRAM) bitcell design for 3-D CoolCube technology platform based on 14-nm fully depleted-silicon on insulator MOS transistors to show the compatibility between the 4T SRAM and the 3-D design and the considerable density gain that they can achieve when combined. The 4T SRAM bitcell has been characterized to in...
Year
DOI
Venue
2017
10.1109/TVLSI.2017.2688862
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Keywords
Field
DocType
Random access memory,Resistance,MOSFET,Failure analysis,Stacking
Silicon on insulator,Computer science,High density,Electronic engineering,Static random-access memory,Real-time computing,Planar,Memory array,MOSFET,Transistor,Electrical engineering,Stacking
Journal
Volume
Issue
ISSN
25
8
1063-8210
Citations 
PageRank 
References 
2
0.53
8
Authors
7
Name
Order
Citations
PageRank
Reda Boumchedda131.24
Jean-Philippe Noël2237.54
Bastien Giraud35317.41
Kaya Can Akyel420.53
Melanie Brocard520.53
D. Turgis6114.96
Edith Beigne753652.54