Name
Abstract | ||
|---|---|---|
A processor array containing 1000 independent processors and 12 memory modules was fabricated in 32-nm partially depleted silicon on insulator CMOS. The programmable processors occupy 0.055 mm2 each, contain no algorithmspecific hardware, and operate up to an average maximum clock frequency of 1.78 GHz at 1.1 V. At 0.9 V, processors operating at an average of 1.24 GHz dissipate 17 mW while issuing... |
Year | DOI | Venue |
|---|---|---|
2017 | 10.1109/JSSC.2016.2638459 | IEEE Journal of Solid-State Circuits |
Keywords | Field | DocType |
Clocks,Oscillators,Pipelines,Parallel processing,Throughput,Memory management,Ports (Computers) | Instructions per cycle,Processor array,Computer science,Electronic engineering,CMOS,Bisection bandwidth,Memory management,Throughput,Electrical engineering,Independent clock,Clock rate | Journal |
Volume | Issue | ISSN |
52 | 4 | 0018-9200 |
Citations | PageRank | References |
18 | 0.81 | 16 |
Authors | ||
8 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Brent Bohnenstiehl | 1 | 33 | 3.90 |
| Aaron Stillmaker | 2 | 61 | 5.12 |
| Jon J. Pimentel | 3 | 58 | 4.50 |
| Timothy Andreas | 4 | 31 | 2.15 |
| Bin Liu | 5 | 1281 | 68.98 |
| Anh Tran | 6 | 21 | 1.67 |
| Emmanuel Adeagbo | 7 | 31 | 2.15 |
| Bevan M. Baas | 8 | 295 | 27.78 |