Name
Title | ||
|---|---|---|
A 74.33 Db Sndr 20 Msps 2.74 Mw Pipelined Adc Using A Dynamic Deadzone Ring Amplifier |
Abstract | ||
|---|---|---|
Ring amplifiers have emerged as a scalable amplification technique. This work is a ring amplifier built with current starved inverters in the intermediate stage. This structure allows for the implementation of a dynamic deadzone that allows a single amplifier to perform both coarse estimation and fine settling. A pipelined ADC with a sampling speed of 20 MSPS is implemented in 0.18um CMOS. The ADC consumes 2.74 mW and achieves a peak SNDR of 7433 dB which provides a FoM of 32.2 fJ/c-step with no calibration required. |
Year | Venue | Field |
|---|---|---|
2017 | 2017 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC) | Dead zone,Computer science,Electronic engineering,Control engineering,CMOS,Sampling (statistics),Calibration,Scalability,Amplifier |
DocType | Citations | PageRank |
Conference | 0 | 0.34 |
References | Authors | |
2 | 5 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Spencer Leuenberger | 1 | 7 | 4.74 |
| Muhlestein, J. | 2 | 12 | 4.25 |
| hyuk sun | 3 | 1 | 3.08 |
| Praveen Kumar Venkatachala | 4 | 3 | 4.79 |
| Un-Ku Moon | 5 | 836 | 140.98 |