Title
23.7 A time-based receiver with 2-tap DFE for a 12Gb/s/pin single-ended transceiver of mobile DRAM interface in 0.8V 65nm CMOS.
Abstract
Single-ended transceivers are mostly used for DRAM interfaces to reduce pin count. A low-supply transceiver is preferred, especially for mobile DRAM interfaces, for low-power consumption while maintaining a high-speed interface for transmission of image data [1]. To reduce transmitter power in single-ended transceivers, both the supply voltage and the signal swing are reduced: 0.8V and 200mV, or below [2]. However, with a small signal swing the low-supply voltage limits the maximum data rate that can be handled by the receiver (RX); the maximum data rate reported is below 10Gb/s with a supply voltage of 0.8V in 65nm CMOS [2-4]. In a conventional RX at a low-supply voltage, the maximum data rate is limited by the small g m /C of the RX front-end circuit. To eliminate this g m /C constraint, this work proposes a time-based RX for 12Gb/s operation at 0.8V.
Year
Venue
Field
2017
ISSCC
Dram,Transmitter,Transceiver,Computer science,Voltage,CMOS,Electronic engineering,Data rate,Electrical engineering,Mobile telephony,Swing
DocType
Citations 
PageRank 
Conference
0
0.34
References 
Authors
4
9
Name
Order
Citations
PageRank
Il-Min Yi1213.66
Min-Kyun Chae2224.01
Seok-Hun Hyun322.79
Seung-Jun Bae416732.40
Junghwan Choi527933.08
Seong-jin Jang69927.16
Byungsub Kim7163.60
Jae-yoon Sim850883.58
Hong-june Park946572.93