Title | ||
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23.5 A 4Gb LPDDR2 STT-MRAM with compact 9F2 1T1MTJ cell and hierarchical bitline architecture. |
Abstract | ||
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Spin-transfer torque magnetic RAM (STT-MRAM) is one of the most promising nonvolatile memories with guaranteed high-speed read and write operations. Along with performance improvements in the tunnel magnetoresistance (TMR) and the magnetic tunnel junctionu0027s (MTJ) required switching current, there have also been reports on high-capacity (up to tens of Mb) STT-MRAM [1–4]. In [2] a perpendicular-TMR (pMTJ) device is used to reduce the switching current and a high-speed current sense amplifier is proposed. In [3] a 54nm 2T-1MTJ 14F 2 -cell is proposed that uses a high-density DRAM process: self-aligned contact and plug process. However, the unit cell area of STT-MRAM is still much larger than that of DRAM, making STT-MRAM not cost-competitive to contemporary DRAM. |
Year | Venue | Field |
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2017 | ISSCC | Dram,Torque,Computer science,Electronic engineering,Magnetoresistive random-access memory,Tunnel magnetoresistance,Transistor,Current sense amplifier,Electrical engineering |
DocType | Citations | PageRank |
Conference | 1 | 0.37 |
References | Authors | |
2 | 17 |
Name | Order | Citations | PageRank |
---|---|---|---|
Kwangmyoung Rho | 1 | 1 | 0.37 |
kenji tsuchida | 2 | 4 | 4.03 |
Dongkeun Kim | 3 | 1 | 1.38 |
Yutaka Shirai | 4 | 1 | 0.37 |
Jihyae Bae | 5 | 1 | 0.37 |
Tsuneo Inaba | 6 | 1 | 0.37 |
Hiromi Noro | 7 | 5 | 0.91 |
Hyunin Moon | 8 | 1 | 0.37 |
Sungwoong Chung | 9 | 1 | 0.37 |
Kazumasa Sunouchi | 10 | 1 | 0.37 |
Jinwon Park | 11 | 1 | 0.37 |
Kiseon Park | 12 | 1 | 0.37 |
Akihito Yamamoto | 13 | 1 | 0.37 |
Seoungju Chung | 14 | 1 | 0.37 |
Hyeongon Kim | 15 | 7 | 1.30 |
Hisato Oyamatsu | 16 | 1 | 0.37 |
Jonghoon Oh | 17 | 4 | 1.87 |