Title
An Output-Capacitorless Ultra-Low Power Low-Dropout Regulator.
Abstract
This paper proposes an output-capacitorless low-dropout (LDO) regulator with ultra-low quiescent power. It applies an adaptive error amplifier to improve the bandwidth and transient response during heavy load, and a second gain stage to improve the stability during light load. Furthermore, an overshoot and undershoot reduction circuit is used to shorten the settling time when output load is changed. The LDO is fabricated in 0.18 mu m CMOS process and occupies a chip area of 0.06mm(2). The LDO is measured to output a stable voltage at 1.6V with a quiescent power of 1.8 mu W. The experimental results also show a good transient response.
Year
DOI
Venue
2017
10.1142/S0218126617501936
JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS
Keywords
Field
DocType
Low-dropout regulator,output-capacitorless,quiescent power,transient response
Transient response,Regulator,Computer science,Control theory,Error amplifier,Electronic engineering,Bandwidth (signal processing),Low-dropout regulator
Journal
Volume
Issue
ISSN
26
12
0218-1266
Citations 
PageRank 
References 
0
0.34
5
Authors
6
Name
Order
Citations
PageRank
Xin Cheng101.35
Hongyu Liang28416.39
Longjie Du300.34
Zhang Zhang458.09
Maoxiang Yi5289.14
Guangjun Xie6299.64