Abstract | ||
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This article consists of a collection of slides from the authors' conference presentation. Zynq UltraScale+ MPSoC: 2nd Generation SoC from Xilinx - Applications processing, Real-time, Graphics, Video, Serial connectivity - Power management, Safety, Security - SDSoC: Full system optimizing compiler; More than Moore: Architectural innovation - 3x CPU performance and 4.5x memory bandwidth (SoC) -UltraScale+ fabric: 60% higher performance, 2.5x performance/watt (FPGA) - 3rd generation of silicon interposer technology (3D IC); Taped out in Jun 2015 on TSMC 16FF+ - Significant power and performance benefits with 3D FinFet transistors - Diverse SW and systems running on multiple platforms today. |
Year | DOI | Venue |
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2015 | 10.1109/HOTCHIPS.2015.7477457 | 2015 IEEE Hot Chips 27 Symposium (HCS) |
Keywords | Field | DocType |
video processing,real-time graphics,pipeline analysis,3D FinFet transistors,3D IC,silicon interposer technology,memory bandwidth,CPU performance,architectural innovation,full system optimizing compiler,SDSoC,power management,serial connectivity,applications processing,Xilinx,2nd generation SoC,FPGA,MPSoC,Zynq UltraScale | Power management,Computer architecture,Computer performance,System on a chip,Memory bandwidth,Computer science,Field-programmable gate array,Optimizing compiler,Three-dimensional integrated circuit,MPSoC,Embedded system | Conference |
ISSN | Citations | PageRank |
2573-203X | 3 | 0.44 |
References | Authors | |
0 | 6 |
Name | Order | Citations | PageRank |
---|---|---|---|
Vamsi Boppana | 1 | 3 | 0.44 |
Sagheer Ahmad | 2 | 3 | 1.12 |
Ilya Ganusov | 3 | 3 | 0.44 |
Vinod Kathail | 4 | 340 | 35.85 |
Vidya Rajagopalan | 5 | 271 | 293.84 |
Ralph Wittig | 6 | 57 | 5.64 |