Abstract | ||
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Different from training common neural networks (NNs) for inference on general-purpose processors, the development of NNs for neuromorphic chips is usually faced with a number of hardware-specific restrictions. This paper proposes a systematic methodology to address the challenge. It can transform an existing trained, unrestricted NN (usually for software execution substrate) into an equivalent network that meets the given hardware constraints, which decouples NN applications from target hardware. We have built such a software tool that supports both spiking neural networks (SNNs) and traditional artificial neural networks (ANNs). Its effectiveness has been demonstrated with a real neuromorphic chip and a processor-in-memory(PIM) design. Tests show that the extra inference error caused by this solution is very limited and the transformation time is much less than the retraining time. |
Year | DOI | Venue |
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2017 | 10.1109/PACT.2017.59 | 2017 26th International Conference on Parallel Architectures and Compilation Techniques (PACT) |
Keywords | Field | DocType |
neuromorphic hardware,general-purpose processors,neuromorphic chips,software tool,spiking neural networks,artificial neural networks,processor-in-memory design,PIM design | Physical neural network,Computer science,Inference,Parallel computing,Neuromorphic engineering,Chip,Types of artificial neural networks,Time delay neural network,Spiking neural network,Artificial neural network | Conference |
ISSN | ISBN | Citations |
1089-795X | 978-1-5090-6765-7 | 0 |
PageRank | References | Authors |
0.34 | 1 | 4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Yu Ji | 1 | 16 | 2.24 |
Youhui Zhang | 2 | 202 | 28.36 |
Wenguang Chen | 3 | 1014 | 70.57 |
Yuan Xie | 4 | 6430 | 407.00 |