Name
Abstract | ||
|---|---|---|
Circuits with security constraints must be protected against hardware attacks, including laser-based perturbations. Early evaluations at design time are required to avoid costly and time consuming modifications that might be required after actual laser attacks on the first prototypes. Such evaluations include fault injection compaigns from RTL descriptions. The accuracy of the results depends on the fault model used during the injections. This paper discusses the results obtained by emulation-based fault injections in two AES crypto-processors with three different fault models providing some insights into the consequences of the model chosen for evaluation. |
Year | DOI | Venue |
|---|---|---|
2016 | 10.1109/IVSW.2016.7566603 | 2016 1st IEEE International Verification and Security Workshop (IVSW) |
Keywords | DocType | ISBN |
hardware security,laser attacks,fault injections,error models | Conference | 978-1-5090-1142-1 |
Citations | PageRank | References |
0 | 0.34 | 10 |
Authors | ||
6 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Régis Leveugle | 1 | 354 | 44.83 |
| A. Chahed | 2 | 0 | 0.34 |
| Paolo Maistri | 3 | 245 | 20.35 |
| Athanasios Papadimitriou | 4 | 23 | 5.24 |
| David Hély | 5 | 89 | 21.91 |
| Vincent Beroulle | 6 | 86 | 21.86 |