Name
Abstract | ||
|---|---|---|
With the increasing technological complexity modern SoC designs continue to grow in size and involve increasingly more IPs. Therefore, it becomes much harder to complete testing of large SoCs within the desired schedule and cost. Usually an automated hierarchical test helps to solve this problem efficiently but for such systems the preparation of input data, especially IP level information and description of test patterns, usually takes very long time. In this paper, an efficient solution for preparing input data for hierarchical system is presented. |
Year | Venue | Field |
|---|---|---|
2017 | East-West Design & Test Symposium | Hierarchical control system,Multiprotocol Label Switching,Computer science,Flow (psychology),Server,Theoretical computer science,Computer hardware,Hierarchical test,Distributed computing |
DocType | ISSN | Citations |
Conference | 2373-826X | 0 |
PageRank | References | Authors |
0.34 | 3 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| D. Sargsyan | 1 | 0 | 0.68 |
| Gurgen Harutyunyan | 2 | 19 | 7.30 |
| Samvel K. Shoukourian | 3 | 165 | 16.88 |
| Yervant Zorian | 4 | 1994 | 215.23 |