Name
Title | ||
|---|---|---|
MTTF-aware design methodology of error prediction based adaptively voltage-scaled circuits. |
Abstract | ||
|---|---|---|
Adaptive voltage scaling is a promising approach to overcome manufacturing variability, dynamic environmental fluctuation, and aging. This paper focuses on error prediction based adaptive voltage scaling (EP-AVS) and proposes an MTTF-aware design methodology for EP-AVS circuits. Main contributions of this work include (1) optimization of both voltage-scaled circuit and voltage control logic, and (2) quantitative evaluation of voltage reduction for practically long MTTF. Evaluation results show that the proposed EP-AVS design methodology achieves 20.8% voltage reduction while satisfying target MTTF.
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Year | DOI | Venue |
|---|---|---|
2018 | 10.1109/ASPDAC.2018.8297299 | ASP-DAC |
Keywords | Field | DocType |
adaptive voltage scaling, critical path isolation, mean time to failure, timing error predictive FF | Voltage reduction,Mean time between failures,Logic gate,Computer science,Voltage control,Voltage,Design methods,Adaptive voltage scaling,Electronic engineering,Electronic circuit | Conference |
ISSN | ISBN | Citations |
2153-6961 | 978-1-4503-6007-4 | 1 |
PageRank | References | Authors |
0.36 | 12 | 2 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Yutaka Masuda | 1 | 8 | 2.56 |
| Masanori Hashimoto | 2 | 462 | 79.39 |