Paper Info
Title
A light-weight hardware/software co-design for pairing-based cryptography with low power and energy consumption
Abstract
Embedded electronic devices and sensors such as smartphones, smart watches, medical implants, and Wireless Sensor Nodes (WSN) are making the “Internet of Things” (IoT) a reality. Such devices often require cryptographic services such as authentication, integrity and non-repudiation, which are provided by Public-Key Cryptography (PKC). As these devices are severely resource-constrained, choosing a suitable cryptographic system is challenging. Pairing Based Cryptography (PBC) is among the best candidates to implement PKC in lightweight devices. In this research, we present a fast and energy efficient implementation of PBC based on Barreto-Naehrig (BN) curves and optimal Ate pairing using hardware/software co-design. Our solution consists of a hardware-based Montgomery multiplier, and pairing software running on an ARM Cortex A9 processor in a Zynq-7020 System-on-Chip (SoC). The multiplier is protected against simple power analysis (SPA) and differential power analysis (DPA), and can be instantiated with a variable number of processing elements (PE). Our solution improves performance (in terms of latency) over an open-source software PBC implementation by factors of 2.34 and 2.02, for 256- and 160-bit field sizes, respectively, as measured in the Zynq-7020 SoC.
Year
DOI
Venue
2017
10.1109/FPT.2017.8280149
2017 International Conference on Field Programmable Technology (ICFPT)
Keywords
Field
DocType
ECC,pairing-based cryptography,Montgomery multiplier,hardware-software co-design,system-on-chip,embedded
Power analysis,ARM architecture,Pairing-based cryptography,Cryptography,Computer science,Field-programmable gate array,Real-time computing,Pairing,Software,Energy consumption,Embedded system
Conference
ISBN
Citations 
PageRank 
978-1-5386-2657-3
0
0.34
References 
Authors
8
3
Name
Order
Citations
PageRank
Ahmad Salman110.68
William Diehl2143.67
Jens-Peter Kaps343037.83