Name
Title | ||
|---|---|---|
Self-adaptive hardware architecture with parallel processing capabilities and dynamic reconfiguration |
Abstract | ||
|---|---|---|
This paper describes a new self-adaptive hardware architecture with fault tolerance capabilities and a development system that allows the creation of applications. This bioinspired architecture is based on an array of cells with capacity for parallel processing, which implements in a distributed way self-adaptive capabilities, like self-routing, self-placement and runtime self-configuration. This cell array together with a component-level routing constitutes a SANE (Self-Adaptive Networked Entity). An integrated development environment and a physical prototype based on two FPGA boards has been built in order to assess the features of the proposed architecture.
|
Year | DOI | Venue |
|---|---|---|
2017 | 10.1145/3152881.3152885 | ARM@Middleware |
Field | DocType | ISBN |
Architecture,Computer architecture,Computer science,Parallel processing,Field-programmable gate array,Fault tolerance,Self adaptive,Control reconfiguration,Hardware architecture,MIMD | Conference | 978-1-4503-5168-3 |
Citations | PageRank | References |
0 | 0.34 | 11 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Javier Soto Vargas | 1 | 0 | 0.34 |
| Juan Manuel Moreno | 2 | 186 | 32.74 |
| Jordi Madrenas | 3 | 150 | 27.87 |
| J. Cabestany | 4 | 34 | 5.44 |