Name
Title | ||
|---|---|---|
A Fast and Jitter-Modulation Free Jitter Tolerance Estimation Technique for Bang- Bang CDRs. |
Abstract | ||
|---|---|---|
Analysis of jitter tolerance of CDR circuit is important for high-speed serial link design. This article presents a simple yet effective method for evaluating the tracking capability of CDR, which is applied to the analysis. |
Year | DOI | Venue |
|---|---|---|
2018 | 10.1109/MDAT.2017.2753700 | IEEE Design & Test |
Keywords | Field | DocType |
Jitter,Clocks,Bit error rate,System recovery,High-speed networks,Radiation detectors | Serial communication,Particle detector,Bang bang,Effective method,Computer science,Electronic engineering,Modulation,Jitter,Bit error rate | Journal |
Volume | Issue | ISSN |
35 | 1 | 2168-2356 |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Yen-Long Lee | 1 | 1 | 1.73 |
| Yu-Po Cheng | 2 | 0 | 0.68 |
| Soon-Jyh Chang | 3 | 655 | 73.67 |
| Hsin-Wen Ting | 4 | 41 | 8.81 |