Title | ||
---|---|---|
Delay-locked loop based clock and data recovery with wide operating range and low jitter in a 65-nm CMOS process. |
Year | Venue | DocType |
---|---|---|
2017 | I. J. Circuit Theory and Applications | Journal |
Volume | Issue | Citations |
45 | 6 | 0 |
PageRank | References | Authors |
0.34 | 0 | 4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Yuan Wang | 1 | 29 | 12.96 |
Yuequan Liu | 2 | 0 | 1.69 |
Song Jia | 3 | 6 | 7.00 |
zhang | 4 | 10 | 9.77 |