Name
Title | ||
|---|---|---|
Session 7 overview: Neuromorphic, clocking and security circuits: Digital circuits subcommittee |
Abstract | ||
|---|---|---|
The eight papers in this session highlight developments in neuromorphic acceleration, clocking circuits and security building blocks. A highlighted paper demonstrates a neuromorphic accelerator with stochastic synapses and embedded online reinforcement learning in autonomous micro-robots. The clocking papers presented demonstrate an all-digital multiplying DLL, a synthesizable fractional-N PLL and a synthesizable period-jitter sensor. Improvements to random-number generators and physically unclonable functions provide lower error rates and lossless stabilization by a novel remapping scheme. |
Year | DOI | Venue |
|---|---|---|
2018 | 10.1109/ISSCC.2018.8310211 | 2018 IEEE International Solid - State Circuits Conference - (ISSCC) |
Field | DocType | ISBN |
Phase-locked loop,Digital electronics,Computer science,Neuromorphic engineering,Electronic engineering,Acceleration,Electronic circuit,Reinforcement learning,Lossless compression | Conference | 978-1-5386-2227-8 |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| youngmin shin | 1 | 0 | 1.35 |
| Phillip Restle | 2 | 93 | 12.63 |
| Edith Beigne | 3 | 536 | 52.54 |